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Asynchronous Computers don't have clocks. The image at the right tries to convey this unusual idea. It was the logo for a recent international conference on asynchronous design. | |||||
| I have been doing asynchronous research for about 5 years. Here are some of my publications.
Kearney D Event Driven Logic Applications for DSP in Communication Systems 2nd Int. Symposium on DSP for Communication Systems IEEE Adelaide April 1994 David A. Kearney and Neil W. Bergmann "Performance Evaluation of Asynchronous Logic Pipelines with Data Dependant Processing Delays" 2nd Working Conference on Asynchronous Design Methodologies, South Bank University, London UK 30-31 May, 1995 D. A. Kearney N.W. Bergmann and R G. Burford "Performance Enhancment Tecniques for Wavefront Array Filter Structures" ISSPA96 Gold Coast 1996 |
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| List of Publications | ||||||
Asynchronous (also called event driven and self-timed) logic is defined here as logic that operates without the co-ordination of a global clock. Asynchronous logic circuits are an active area of research with a new annual conference and a substantial output of journal publications every year. In the last year several new large scale asynchronous logic chips have been fabricated. Major companies involved in computer hardware design such as Intel and Sun Microsystems have active research groups focussed on asynchronous logic.
The time scales of a system without a global clock are determined by the partial order of events happening within the system. The starting time of a computation of a logic function is determined by the availability of the data from the previous stages. For example if one computation follows another the total time to complete could be as little as the sum of the actual times for each activity. (In a typical clocked system the time taken is at least the sum of the longest times of the two activities).
Significant recent interest in asynchronous logic has come about in part because of potential improvements in system performance. The following are major claims that have been made for the advantages of using asynchronous design.
1. When completion detection is used in asynchronous circuit design the computation rate tends towards the average rate of the system components rather than the worst case rate of components as in clocked systems.
2. Because asynchronous components only begin processing data when it becomes available they will only consume dynamic power when doing useful work; as compared with a clocked system which consumes dynamic power on every clock cycle regardless of the work done. This reduces system power consumption which is especially important for portable equipment.
3. Asynchronous circuits are more modular because they rely only on local communication between components as compared to circuits with global clocking. The modularity claim leads to arguments that asynchronous circuits may be easier to design and formally verify.
My research has focussed on investigating claim 1.